Introduction
All layouts have been designed so that the SOIC sits of to the side rather than in the center like most commerically developed boards this makes it easier for home assembly where single row headers are used.
All headers adaptors use the standard 0.3″ device spacing, and the standard SOIC pin spacing, (the thinner spacing between the rows of pins). Please note some EEPROM’s use wider spacing’s between the two rows of pins and will not fit on these adaptors